子空间分解在FPGA上的高效实现  

High Efficient FPGA Implementation of Subspace Decomposition

作　　者：廉保旺[1] 邹晓军[1] 

机构地区：[1]西北工业大学电子与信息学院,陕西西安710129

出　　处：《计算机测量与控制》2009年第8期1629-1631,1657,共4页Computer Measurement &Control

基　　金：西北工业大学科技创新基金(2007KJ01028)

摘　　要：传统的信号子空间分解算法有着算法复杂、运算量大的缺点,紧缩近似投影子空间跟踪算法克服了上述缺点,但在硬件实现时其顺序串行的结构却严重地制约了数据处理速度,文章介绍了并行流水线结构的紧缩近似投影子空间跟踪算法在FPGA上的实现方法,同时也讨论了延时对算法收敛速度造成的负面影响,最后在Quartus Ⅱ环境下验证了算法改进后的性能;结果表明所实现的算法误差较小,达到了很高的数据处理速度,适合在实时性要求较高的场合应用。Traditional subspace decomposition algorithm has many disadvantages, such as complex, high computational burden and so on. Projection approximation subspaee tracking with deflation （PASTd） algorithm succeeds in getting rid of these problems, hut when it is implemented on the hardware, the bad serial structure limits the data processing speed. The paper introduces a method that explains how the parallel and pipelining PASTd algorithm is implemented on FPGA. Additionally, the negative effect on convergent speed caused by inserting delay is also discussed. At last, the performance of modified algorithm was verified in the Quartus II developing environment. The results show that not only the error is very small, but also the data processing speed is very high. It makes out that the method is suitable to be used in the situation where the task should be processed in real--time.

关 键 词：子空间分解 近似投影子空间跟踪 FPGA 流水线 

分 类 号：TN911.72[电子电信—通信与信息系统] TP331.1[电子电信—信息与通信工程]