CompactPCI板卡硬件设计与传输速率测试  

Design of CompactPCI communication card and its bandwidth test

作　　者：张强[1] 耿爱辉[1] 曹立华[1] 王挺锋[1] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所,吉林长春130033

出　　处：《光学精密工程》2009年第8期2047-2052,共6页Optics and Precision Engineering

基　　金：中国科学院知识创新工程会员域前沿资助项目

摘　　要：为寻找一种通用便捷的高速通讯卡设计方法,研究了CompactPCI总线特点、总线延时与通讯带宽的关系,提出了一种利用双端口RAM实现PCI总线与本地端总线这两种不同协议、不同工作频率总线隔离的硬件结构。利用该方法可简化硬件设计和驱动程序的编写,并将接口芯片与驱动程序封装成模块,有利于后续功能板卡的开发。同时,制作出实验板,验证了该方法的可行性,实际测量了各种通讯方式下的通讯速率,得到的最高传输速率为117.97MB/s。实验表明,利用此方案制作的通讯卡通讯速率可满足高速通讯要求,且方法简便易行。To realize a common and feasible design method for a high speed communication card, this paper introduces the characteristics of the CompactPCI bus and describes the relations of bus latency and communication bandwidth simply. A kind of hardware architecture based on dual-port RAM is proposed to isolate different agreements and different frequency buses of the PCI bus and the local bus. By using this method, the hardware design and drive programming are simplified greatly,and the interface chip and the drive chip are integrated to be modules for the development of function cards. At the same time,a experimental card is produced to test the feasibility of the method, and obtained optimal communication bandwidth by the experimental card is 117.97 MB/s at different communieation modes. Experimental results show that the eommunieation bandwidth of the experimental communication card meets the requirements of high speed and the method is easy to realize.

关 键 词：通讯卡 COMPACTPCI 双端口RAM PCI局部总线 

分 类 号：TP334.7[自动化与计算机技术—计算机系统结构]