Parallel LDPC Decoding on GPUs Using a Stream-Based Computing Approach  

作　　者：Gabriel Falcao Student Member Shinichi Yamagiwa Vitor Silva Leonel Sousa Senior Member 

机构地区：[1]Department of Electrical and Computer Engineering, University of Coimbra, Instituto de Telecomunicacoes PoloⅡUniversidade de Coimbra, 3030-290 Coimbra, Portugal [2]INESC-ID, Technical University of Lisbon, Rua Alves Redol n.9, 1000-029 Lisboa, Portugal [3]Department of Electrical and Computer Engineering, IST, Technical University of Lisbon, Rua Alves Redol n.9 1000-029 Lisboa, Portugal

出　　处：《Journal of Computer Science & Technology》2009年第5期913-924,共12页计算机科学技术学报（英文版）

基　　金：Supported by the Portuguese Foundation for Science and Technology,through the FEDER program,and also under Grant No.SFRH/BD/37495/2007

摘　　要：Low-Density Parity-Check （LDPC） codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and very intensive message-passing computation, and usually require hardware-based dedicated solutions. With the exponential increase of the computational power of commodity graphics processing units （GPUs）, new opportunities have arisen to develop general purpose processing on GPUs. This paper proposes the use of GPUs for implementing flexible and programmable LDPC decoders. A new stream-based approach is proposed, based on compact data structures to represent the Tanner graph. It is shown that such a challenging application for stream-based computing, because of irregular memory access patterns, memory bandwidth and recursive flow control constraints, can be efficiently implemented on GPUs. The proposal was experimentally evaluated by programming LDPC decoders on GPUs using the Caravela platform, a generic interface tool for managing the kernels＇ execution regardless of the GPU manufacturer and operating system. Moreover, to relatively assess the obtained results, we have also implemented LDPC decoders on general purpose processors with Streaming Single Instruction Multiple Data （SIMD） Extensions. Experimental results show that the solution proposed here efficiently decodes several codewords simultaneously, reducing the processing time by one order of magnitude.Low-Density Parity-Check （LDPC） codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and very intensive message-passing computation, and usually require hardware-based dedicated solutions. With the exponential increase of the computational power of commodity graphics processing units （GPUs）, new opportunities have arisen to develop general purpose processing on GPUs. This paper proposes the use of GPUs for implementing flexible and programmable LDPC decoders. A new stream-based approach is proposed, based on compact data structures to represent the Tanner graph. It is shown that such a challenging application for stream-based computing, because of irregular memory access patterns, memory bandwidth and recursive flow control constraints, can be efficiently implemented on GPUs. The proposal was experimentally evaluated by programming LDPC decoders on GPUs using the Caravela platform, a generic interface tool for managing the kernels＇ execution regardless of the GPU manufacturer and operating system. Moreover, to relatively assess the obtained results, we have also implemented LDPC decoders on general purpose processors with Streaming Single Instruction Multiple Data （SIMD） Extensions. Experimental results show that the solution proposed here efficiently decodes several codewords simultaneously, reducing the processing time by one order of magnitude.

关 键 词：data-parallel computing graphics processing unit （GPU） Caravela low-density parity-check （LDPC） code error correcting code 

分 类 号：TP334.7[自动化与计算机技术—计算机系统结构] TN911.22[自动化与计算机技术—计算机科学与技术]