Challenges of 22 nm and beyond CMOS technology  

作　　者：HUANG Ru WU HanMing KANG JinFeng XIAO DeYuan SHI XueLong AN Xia TIAN Yu WANG RunSheng ZHANG LiangLiang ZHANG Xing WANG YangYuan 

机构地区：[1]Department of Microelectronics, Peking University, Beijing 1000871, China [2]Semiconductor Manufacturing International Corporation (SMIC), Beijing 100176, China

出　　处：《Science in China(Series F)》2009年第9期1491-1533,共43页中国科学（F辑英文版）

基　　金：the National Natural Science Foundation of China (Grant Nos. 60625403, 90207004);the National Basic Research Program of China (Grant No. 2006CB302701)

摘　　要：It is predicted that CMOS technology will probably enter into 22 nm node around 2012. Scaling of CMOS logic technology from 32 to 22 nm node meets more critical issues and needs some significant changes of the technology, as well as integration of the advanced processes. This paper will review the key processing technologies which can be potentially integrated into 22 nm and beyond technology nodes, including double patterning technology with high NA water immersion lithography and EUV lithography, new device architectures, high K/metal gate （HK/MG） stack and integration technology, mobility enhancement technologies, source/drain engineering and advanced copper interconnect technology with ultra-low-k process.It is predicted that CMOS technology will probably enter into 22 nm node around 2012. Scaling of CMOS logic technology from 32 to 22 nm node meets more critical issues and needs some significant changes of the technology, as well as integration of the advanced processes. This paper will review the key processing technologies which can be potentially integrated into 22 nm and beyond technology nodes, including double patterning technology with high NA water immersion lithography and EUV lithography, new device architectures, high K/metal gate （HK/MG） stack and integration technology, mobility enhancement technologies, source/drain engineering and advanced copper interconnect technology with ultra-low-k process.

关 键 词：CMOS technology 22 nm technology node device architectures metal gate^high K dielectrics ultra low K dielectrics 

分 类 号：TN912.3[电子电信—通信与信息系统] TB383[电子电信—信息与通信工程]