一种节省芯片面积的频率调制器设计方案  

Design for Frequency Modulator with Reduced Chip Size

作　　者：黄捷[1] 

机构地区：[1]复旦大学电子工程系

出　　处：《Journal of Semiconductors》1998年第9期683-690,共8页半导体学报（英文版）

摘　　要：本文采用新结构设计了一种用ＡＳＩＣ实现的频率调制器宏单元．用通常的方法设计频率调制器需要使用乘法器实现系数的乘法运算，因而需要很大的芯片面积．通过将ＲＯＭ存储的正弦波形改用对数格式，可将原来所需的乘法运算变换为对数格式数据的加法运算．将对数格式的波形数据变换为正常数据格式也使用了ＲＯＭ查表方法．由于省掉了乘法器，芯片的面积大大缩小．利用０．５μｍＣＭＯＳ工艺设计版图并进行投片，测试结果显示达到了预期的设计要求．Abstract A Frequency Modulator Macrocell has been developed to reduce chip size. Multiplier is needed to achieve coefficient multiplication in a standard Frequency Modulation system which consumes a large chip size. In our design, the sinusoid wave stored in the ROM is in the logarithm format, and the original multiplication operation is transfered into addition operation. A ROM is also used for the exponent operation which transfers the logarithm data to the normal format. The chip size is largely minimized by the omitting of multiplier. The layout of the circuit has been designed in 0.5μm CMOS process, and the successful test chip has been achieved.

关 键 词：频率调制技术 芯片 设计 

分 类 号：TN761.202[电子电信—电路与系统]