片上总线型PowerPC系统控制器的FPGA设计  

FPGA Implementation of On-chip Bus Structured System Controller for PowerPC

作　　者：王经典[1] 陆伊[1] 李修杰[1] 王科[1] 

机构地区：[1]中国航空无线电电子研究所,上海200233

出　　处：《航空电子技术》2009年第3期24-28,共5页Avionics Technology

摘　　要：介绍了PowerPC系统控制器两种结构中IP互连和复用的优缺点,分析了片上总线型系统控制器的各子模块结构,采用硬件描述语言(HDL)描述该控制器功能,并采用Modelsim进行仿真,最后进行了FPGA原型验证。验证结果表明,采用片上总线结构的系统控制器不仅能实现预期功能,还解决了IP互连问题,提高了IP的可复用性。In terms of IP interconnect and reusability, this paper introduced the characteristics of two kinds of structures of system controller for PowerPC, and it analyzed the sub-modules in on-chip bus structured system controller and described the functions with HDL. It carried out simulation with modelsim and finally prototyped with FPGA. These results show that, with on-chip bus, system controller can achieve the desired functions, simplify the IP interconnect, and improve the IP reusability.

关 键 词：PB总线 DMA控制器 SDRAM控制器 异步存储器控制器 UART控制器 

分 类 号：TP334.4[自动化与计算机技术—计算机系统结构]