进电方式对P型硅极间电阻影响的试验研究  

Experimental Research of Influence on Interelectrode Resistance of P-type Silicon with Different Conduction Mode

作　　者：毕勇[1] 刘志东[1] 邱明波[1] 汪炜[1] 田宗军[1] 胡燕伟[1] 黄因慧[1] 

机构地区：[1]南京航空航天大学机电学院,江苏南京210016

出　　处：《电加工与模具》2009年第5期10-13,共4页Electromachining & Mould

基　　金：江苏省高技术研究计划资助项目(BG2007004)

摘　　要：研究了不同进电方式条件下P型硅极间电阻的变化特征,并从进电有效接触面积的角度对其进行分析。通过对电阻率4.7Ω.cm的P型硅进行放电切割,获取的单脉冲放电电压、电流波形验证了试验分析的正确性。结果表明,面进电方式下P型硅的极间电阻最小,且进电有效接触面积越大,P型硅的极间电阻就越小,放电切割电流就越大。The variation features of the interelectrode resistance of p-type silicon with different conduction mode were researched . At the same time, an analysis was carried viewed from the available area of the electricity interface. At last, p-type silicon with resistivity of 2.1 Ω·cm was cutting, and a single pulse voltage and current waves were grabbed, which verified the correctness of experiment analysis. The results show that the interelectrode resistance of p-type silicon is the smallest under face conduction, and it will decrease as the available area of the electricity interface growing, and the current of discharged cutting will increase.

关 键 词：进电方式 放电切割 极间电阻 硅 

分 类 号：TG661[金属学及工艺—金属切削加工及机床]