基于串行RapidIO的通用数字信号处理模块设计  

Design of a Universal Digital Signal Processing Module Based on Serial RapidIO

作　　者：吕遵明[1] 王彦刚[1] 

机构地区：[1]总参第63研究所,江苏省南京市210007

出　　处：《信息化研究》2009年第9期39-41,共3页INFORMATIZATION RESEARCH

摘　　要：随着通信技术发展,要求平台的处理能力越来越高,同时器件间数据交互量也急剧增多,传统器件互连接口已不能胜任。文中采用SRIO(串行RapidIO)技术,设计实现了一种通用的数字信号处理模块,给出了电源和时钟解决方案,实现多个DSP(数字信号处理器)、FPGA(现场可编程门阵列)之间10 Gbit/s的互连带宽。平台方案成功应用于某通信系统中,试验结果表明,模块性能高,运行稳定,满足了高性能通用处理平台要求。With the development of communication technology, more and more processing capability is required. At the same time, the data exchange among chips will increase rapidly, but the old interface standards can＇t satisfy these requirements. Based on Serial RapidIO technology, this paper designs a universal digital signal processing module, gives the solution of power supply and clock generator, realizes multi DSPs and FPGAs connected with 10Gbps interface bandwidth. The scheme has been implemented in some communication systems. The result of operation indicates that the module has powerful functions runs steadily, and satifies high performance processing system requirement.

关 键 词：SRIO 数字信号处理 ADVANCED Mezzanine Card(AMC) 

分 类 号：TN911.72[电子电信—通信与信息系统]