基于DP标准发射端扩频时钟发生器电路设计  

Circuit design of spread-spectrum clock generator based on DP standard

作　　者：刘金岭[1] 

机构地区：[1]淮阴工学院,江苏淮安223003

出　　处：《电子设计工程》2009年第10期20-22,25,共4页Electronic Design Engineering

基　　金：江苏省科技攻关项目(BE2006357);江苏省高校自然科学基金(08KJD510009)

摘　　要：在优化各模块电路性能及相关参数,综合考虑电路功耗、性能等方面因素的基础上,设计符合DisplayPort接口标准的发射端扩频时钟发生器。通过整体的电路级仿真验证,表明该设计达到了降低电磁干扰的目的。The circuit performance and the related parameters of every module circuit have been optimized,circuital power and circuital performance and other factors have been synthetically considered.0n this basis,the comprehensive circuit of spread-spectrum clock generator based on DisplayPort standard is designed.This design meets the DP interface standard and achieves the purpose of reducing electromagnetic interference,which is verified by holistic circuit simulation analysis.

关 键 词：扩频 时钟发生器 电路设计 

分 类 号：TN401[电子电信—微电子学与固体电子学]