正则表达式匹配的高效硬件实现  

Efficient Hardware Realization of Regular Expression Matching

作　　者：孙志刚[1] 张子文[1] 

机构地区：[1]国防科技大学计算机学院,湖南长沙410073

出　　处：《计算机工程与科学》2009年第10期5-7,22,共4页Computer Engineering & Science

基　　金：国家973计划资助项目(2003CB314802);国家242计划资助项目(2006C35)

摘　　要：正则表达式具有编写简单和描述能力强的特点,在报文深度内容检测中得到了广泛应用。但是,由于处理复杂,基于软件的正则表达式匹配的实现难以满足大流量下报文的内容检测。本文首先对实现正则表达式匹配的多模式确定有限自动机(MPDFA)方法进行研究,并基于该方法提出基于硬件实现报文正则表达式匹配的微引擎结构。最后,给出了我们基于AlteraCycloneIIFPGA实现的报文深度内容检查实现方案。其核心是四个实现正则表达式匹配的微引擎。测试表明,通过四个微引擎的并行处理可实现千兆以太网接口报文的线速内容检查。Regular expressions are easy to construct and of good description, so it is becoming widely used in deep packet inspection. It is difficult for software-implemented regular expression matching to satisfy the needs of packet content inspection in the case of huge network traffic. This paper first studies the method of Multi-Pattern Deterministic Finite Automata （MPDFA） ,and based on it,we propose a microengine structure which implements the packet＇s regular expression matching by hardware. This paper finally describes the project of packet content＇s deep inspection whose core is four microengines based on the Altera CycloneⅡ FPGA. Performance evaluation shows that this four-engine parallel processing system can reach the capacity of wire-speed content inspection to the Gigabit Ethernet.

关 键 词：正则表达式 MPDFA 硬件实现 内容检测 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]