全半带滤波器数字D类音频PWM调制芯片设计  

Design of Digital Class-D Audio PWM Modulating Chip Based on Half Band Filter

作　　者：王升杨[1] 李挥[1] 邳雪松[1] 马子龙[1] 

机构地区：[1]北京大学深圳研究生院集成微电子重点实验室,广东深圳518055

出　　处：《电声技术》2009年第10期35-38,共4页Audio Engineering

摘　　要：提出了一种基于全半带滤波器的数字D类音频放大器前级放大芯片,即PWM调制芯片的设计方案,并对其进行了FPGA验证和ASIC实现。经与传统的基于CIC滤波器的设计方案相对比,采用此种设计方案,可在不过分增加面积的前提下,显著减小音频通路的SNR损失。A digital class-D audio amplifier, PWM modulating chip, based on half band filters is designed. The FPGA verification and ASIC implementation are introduced. Compared with the ordinary method based on CIC filter, the proposed method can remarkably decrease the SNR loss of the data path without too much increasing of the die size.

关 键 词：D类放大器 半带滤波器 FPGA ASIC 

分 类 号：TN72[电子电信—电路与系统]