BES-III TOF子触发系统触发判选功能在可编程逻辑器件中的实现  

Implementation of BES-III TOF trigger system in programmable logic devices

作　　者：郑伟[1,2] 刘树彬[1,2] 刘序宗[1,2] 安琪[1,2] 

机构地区：[1]中国科学院核探测技术与核电子学重点实验室物理电子学安徽省重点实验室 [2]中国科学技术大学近代物理系,合肥230026

出　　处：《核技术》2009年第10期795-800,共6页Nuclear Techniques

基　　金：国家大科学工程北京正负对撞机升级项目(BEPCII)资助

摘　　要：北京正负电子对撞机谱仪的飞行时间计数器触发子系统,需从前端读出电子学接收368 bits快时间击中信号,按物理实验要求的触发逻辑产生7 bits触发条件信息,实时发送给主触发逻辑,以产生一级触发信号L1;并向径迹配对逻辑实时发送136 bits位置信息,以推算粒子飞行径迹;同时根据L1信号对事例进行判选、组装,向DAQ系统提供所有有效事例的数据包,以供离线分析。我们对该系统研制秉持可重构的设计理念,大量使用可编程逻辑器件FPGA,增加设计的灵活性和可靠性,减小印刷电路板设计的复杂度,节省PCB布板空间。本文介绍主触发处理FPGA中核心触发逻辑功能的设计与实现。The TOF trigger sub-system on the upgrading Beijing Spectrometer is designed to receive 368 bits fast hit signals from the front end electronics module to yield 7 bits trigger information according to the physical requirement. It sends the processed real time trigger information to the Global-Trigger-Logic to generate the primal trigger signal L1, and sends processed 136 bits real time position information to the Track-Match-Logic to calculate the particle flight tracks. The sub-system also packages the valid events for the DAQ system to read out. Following the reconfigurable concept, a large number of programmable logic devices are employed to increase the flexibility and reliability of the system, and decrease the complexity and the space requirement of PCB layout. This paper describes the implementation of the kernel trigger logic in a programmable logic device.

关 键 词：TOF 触发判选 FPGA 

分 类 号：TL82[核科学技术—核技术及应用]