A detection method for logic functions suitable for dual-logic synthesis  

作　　者：Yinshui Xia Fei Sun Keyi Mao 

机构地区：[1]The Faculty of Information Science ＆ Engineering, Ningbo University, Ningbo 315211, China

出　　处：《Progress in Natural Science:Materials International》2009年第10期1311-1315,共5页自然科学进展·国际材料（英文版）

基　　金：supported by the National Natural Science Foundation of China (Grant No60676017);Zhejiang Natural Science Foundation (Grant No R105614);the Science & Technology Program from the Department of Zhejiang Sci & Tech (Grant No2007C24017)

摘　　要：Logic functions can be implemented in either AND/OR/NOT-based traditional Boolean(TB) logic or AND/XOR-based Reed-Muller(RM) logic.To the majority of logic functions,it will be beneficial to be partially implemented in both TB logic and RM logic,called dual-logic.In this paper,a detection condition favoring dual-logic synthesis is proposed.A corresponding detection algorithm is developed and implemented in C.The algorithm is applied to test a set of MCNC91 benchmarks for verifying the algorithm.The results show that the proposed algorithm is more efficient than published ones.Logic functions can be implemented in either AND/OR/NOT-based traditional Boolean （TB） logic or AND/XOR-based Reed-Muller （RM） logic. To the majority of logic functions, it will be beneficial to be partially implemented in both TB logic and RM logic, called dual-logic. In this paper, a detection condition favoring dual-logic synthesis is proposed. A corresponding detection algorithm is developed and implemented in C. The algorithm is applied to test a set of MCNC91 benchmarks for verifying the algorithm. The results show that the proposed algorithm is more efficient than published ones.

关 键 词：Logic synthesis Boolean logic Reed-Muller logic Detection method 

分 类 号：TN47[电子电信—微电子学与固体电子学] TN791