实时视频采集系统的SDRAM控制器设计  

Design of SDRAM Controller for Real-time Video Acquisition System

作　　者：张文涛[1] 王琼华[1] 李大海[1] 张映权[1] 

机构地区：[1]四川大学电子信息学院视觉合成图形图像技术国防重点学科实验室,四川成都610065

出　　处：《现代电子技术》2009年第20期57-59,共3页Modern Electronics Technique

基　　金：教育部新世纪优秀人才支持计划资助项目(NCET-07-0582)

摘　　要：描述了一种在PAL→VGA的实时视频采集系统中图像数据处理的方法。针对实时视频采集系统一般使用2片SDRAM进行乒乓缓存的方式,给出一种使用一片SDRAM的不同BANK进行乒乓操作的相对容易实现的SDRAM控制器设计方法。该方法通过充分利用SDRAM的切换BANK存取操作并采用指令计数的方式进行读写状态转换,在PAL→VGA实时视频采集系统中实现了利用一片SDRAM进行图像缓存。它在实时视频采集系统中图像数据处理方面,具有良好的应用价值。In this paper,a method of image data processing for PAL→VGA real - time video acquisition system is des - cribed. According to the former method of real - time video acquisition system usually using two SDRAM for ping pong cache, a design method of one SDRAM controller which uses different BANK of SDRAM for ping pong operation is proposed. By using the alternating BANK access operation of SDRAM and using instruction count to convert the read and write state of SDRAM,PAL→VGA real- time video acquisition system uses one SDRAM to realize image cache successfully. The design is well applicable to image data processing for the real - time video acquisition system.

关 键 词：视频采集 FPGA SDRAM控制器 乒乓操作 

分 类 号：TN948[电子电信—信号与信息处理]