向量浮点协处理器VFP-A的设计和验证  

Design and Verification of Vector Floating Point Coprocessor VFP-A

作　　者：杜学亮[1] 金西[1] 

机构地区：[1]中国科技大学物理系微电子学教研室,合肥230026

出　　处：《微电子学》2009年第5期597-601,614,共6页Microelectronics

基　　金：华为基金项目(HITC2006013-1)

摘　　要：介绍了一种高性能浮点协处理器VFP-A的设计和验证。该设计结果符合ARM11协处理器接口规范。它兼容VFP11指令集,并提供可扩展指令,满足了用户的定制需求。在90nm CMOS工艺下,该设计的时钟频率达到了600MHz,具有高性能、低成本和面积小等特点。采用代码覆盖率驱动和功能覆盖率驱动相结合的验证方案,加快了验证进度,也进一步提高了验证的灵活性。经应用程序测试,其性能与ARM11内嵌的浮点协处理器VFP11一致。A high performance floating point coprocessor VFP-A was designed and verified, which was in accordance with interface specification of ARM11 coprocessor. To meet customers＇ requirement, the circuit was compatible with VFP11 instruction set and supported extension instructions. Designed in 90 nm CMOS technology, the high performance and low-cost VFP-A achieved a clock frequency up to 600 MHz. By combining code coverage driver with function coverage driver, verification process was accelerated, and verification flexibility was also improved. Application tests showed that the circuit performance was comparable with ARM11＇s vector floating point coprocessor VFP11.

关 键 词：浮点运算 协处理器 验证 VFP—A 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]