用于VoIP芯片的Σ-Δ调制器系统设计  

System Design of Σ-Δ Modulator for VoIP Chip

作　　者：李杨先[1] 顾晓峰[1] 浦寿杰[1] 徐振 于宗光[1,3] 

机构地区：[1]江南大学信息工程学院,江苏无锡214122 [2]无锡友芯集成电路设计有限公司,江苏无锡214122 [3]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《微电子学》2009年第5期606-609,共4页Microelectronics

基　　金：科技部科技型中小企业技术创新基金资助项目(07C26223201317);教育部新世纪优秀人才支持计划资助项目(NCET-06-0484);江苏省自然科学基金资助项目(BK2007026)

摘　　要：详细分析了Σ-Δ调制器的结构、阶数、量化器位数、过采样率与信噪比的关系;讨论了闪烁噪声和开关热噪声、时钟抖动和运放的有限直流增益等非理想因素对Σ-Δ调制器的影响。通过Matlab行为仿真,确定了调制器的参数。在此基础上,完成了一款三阶2-1级联Σ-Δ调制器的系统结构设计。在Simulink环境下的仿真验证表明,在考虑非理想因素的条件下,调制器的信噪比仍能达到约96dB,可满足VoIP芯片中A/D转换器的16位精度要求。Dependency of SNR with the structure, order, quantizer bits and over-sampling rate of ∑-△ modulator was analyzed in detail. Effects of nonidealities, such as 1/f noise, switching thermal noise, clock jitter and finite DC gain of op-amp on ∑-△ modulator, were discussed. Parameters of the modulator were defined through Matlab behavioral simulation. And based on the analysis, system structure of a third-order 2-1 cascaded ∑-△ modulator was designed. Simulink simulation indicated that, with the above mentioned nonidealities taken into consideration, the modulator still had an SNR of 96 dB, which met the specification of a 16-bit A/D converter in a certain VoIP chip.

关 键 词：∑-△调制器 IP电话 非理想因素 A/D转换器 

分 类 号：TN402[电子电信—微电子学与固体电子学]