基于FPGA的高精度直接数字频率合成器设计  

Design of High Precision Direct Digital Frequency Synthesizer Based on FPGA

作　　者：张静[1] 张流强[1] 李跃文[1] 刘青峰[1] 李金超[1] 

机构地区：[1]重庆大学光电技术及系统教育部重点实验室,重庆400044

出　　处：《重庆工学院学报（自然科学版）》2009年第8期144-148,共5页Journal of Chongqing Institute of Technology

摘　　要：介绍了直接数字频率合成器的原理和特点,给出了利用FPGA实现DDS的方法.采用Brent-Kung二元树结构实现了流水线型累加器,该方法克服了累加器进位链过长的问题,使系统运行速度得到改善;运用并行Cordic(坐标旋转计算)算法实现幅度相位转换,包括提前计算进位方向和将后8级合并为一级,进一步减小了系统所耗硬件资源和功耗,并给出了仿真结果.This paper mainly introduces the principles and characteristics of the DDS （Direct Digital Frequency Synthesizer）, and gives the method of implementing DDS using FPGA. Brent-Kung Binary tree structure is used to implement the pipeline accumulator, which overcomes the problems of long carry-chain of accumulator and makes operating speed of the whole system improved. Parallel Cordic algorithm is used to implement conversion between phase and amplitude, calculate the revolving direction in advance and merge the ultimate 8 pipelines into one, which further reduces hardware resources and power consumption of the system. Finally, the simulation results are presented.

关 键 词：CORDIC算法 流水线 现场可编程逻辑器件 

分 类 号：TN741[电子电信—电路与系统]