一种宽带自偏置CMOS CCII的设计  

Design of a wideband self-biased CMOS CCII

作　　者：曾翠平[1] 王卫东[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《桂林电子科技大学学报》2009年第5期390-392,417,共4页Journal of Guilin University of Electronic Technology

基　　金：广西科学研究与技术开发计划项目(0731021)

摘　　要：一种宽带自偏置CMOS第二代电流传输器(CCII)电路,由轨到轨输入级、缓冲级、电流镜和偏置电路组成,其主要特点是带宽宽、低功耗、电压和电流的传输误差小。通过采用TSMC 0.18μm CMOS工艺参数,进行HSPICE仿真,结果表明:vx/vy和iz/ix的-3 dB带宽分别为1.22 GHz和1.01 GHz,电压和电流传输增益分别为0.982和1.0049,在直流电下的静态功耗为1.9512 mW。据此电路设计的二阶通用滤波器,经仿真结果证明也是可行的。A wideband self-biased CMOS second current conveyor （CCII） was designed. It consisted of rail-to-rail input stage, buffer stage, current mirrors and biased circuit. Its main feature is that the circuit has wide band, low dissipation and minor current and voltage transmission error. Using TSMC 0. 18 μm CMOS process parameters, the HSPICE simulation results showed that vx/vy and ix/ix had - 3 dB bandwidth of 1.22 GHz and 1.01 GHz. Current and voltage transfer gain were 0. 982 and 1. 0049, respectively. The dc power consumption was 1. 9512 mW. As an application, a second-order universal filter based on CCII was realized and simulated.

关 键 词：第二代电流传输器 宽带 自偏置 轨到轨输入级 电流模式滤波器 

分 类 号：TN432[电子电信—微电子学与固体电子学]