高性能处理系统中自修改代码的高效检测技术  

The Hardware Checking Mechanism of SMC in High-Performance Systems

作　　者：谢菲[1] 张浩[1] 

机构地区：[1]中国科学院计算技术研究所前瞻研究实验室,北京100190

出　　处：《计算机工程与科学》2009年第11期30-32,61,共4页Computer Engineering & Science

摘　　要：在主流通用处理系统中,超标量机制及高速缓存使得自修改代码(SMC)成为一种需要特殊处理的情况,为了继续支持使用自修改代码的程序并兼容原有程序,在处理系统设计中需要对SMC的情况进行支持。本文分析并对比了多种程序的SMC行为及解决方案,设计了一种利用FIFO队列在流水线外检测SMC的方案,避免了对主流水线的干扰;并通过复用访存通路来检测SMC导致的缓存一致性问题,由于优化后的设计不需要额外的端口,避免了在数据缓存使用多端口设计,使得整体面积下降了1.16%。同零开销的理想方案相比,该方案对性能的影响小于0.1%。The superscalar pipeline and the cache mechanism make SMC （Self-Modifying Code） a problem in mainstream processing systems. It is necessary to handle this case for compatibility and keep supporting the programs with SMC. This paper analyzes many programs for their SMC behaviors and several methods for SMC handling, and gives a facile method that can be easily implemented to handle the SMC problem. A FIFO queue is used for checking SMC out of the pipeline, decreasing the complexity of the logic, and multiplexing the data memory access paths to avoid the use of multi-port design. In this way, the processor area is reduced by 1.16% , while the performance is influenced no more than 0. 1%.

关 键 词：自修改代码 超标量流水线 高速缓存 乱序执行 

分 类 号：TP303[自动化与计算机技术—计算机系统结构]