高精度数字信号中和器的设计与实现  

High resolution digital signal averager

作　　者：徐欣[1] 李清江[1] 李楠[1] 孙兆林[1] 

机构地区：[1]国防科技大学电子科学与工程学院,长沙410073

出　　处：《国外电子测量技术》2009年第10期79-82,共4页Foreign Electronic Measurement Technology

摘　　要：本文介绍了一种基于超高速数据采集技术的高精度时间间隔测量系统的设计。基于对高精度时间测量应用背景下,时间-数字转换器(Ti me-to-digital Converter,TDC)与数字信号中和器(Digital Signal Averager)优缺点的对比,本文并提出了一种高精度数字信号中和器的设计方案。完成了前端信号调理、超高速数据采集、高速时钟产生、FPGA硬件算法设计、USB2.0接口等模块设计。测试结果表明本系统最小时间分辨率334ps,测量范围0～20us,可广泛应用于高精度时间间隔测量领域。This article introduces a design method for the high-resolution time interval measurement system based on ultra-high speed data acquisition technique. A design for the high resolution Digital Signal Averager is predicted by cornparing the advantages and disadvantages between Time-to-digital Converter（TDC） and Digital Signal Averager m the application which require high resolution time measurement. In this design, a signal conditioning modual, an ultra-high speed data acquisition module, a high-speed clock generating module, data processing and logic controlling circuit based on FPGA, and the USB2.0 interface is implemented. Test results show that the minimum time resolution is 334ps, and the range of measurement is 20us, so the Digntal Signal Averager can be used in the fields which require high resolution time measurement.

关 键 词：时间数字转换 数字信号中和器 超高速数据采集 FPGA USB2.0 

分 类 号：TM935.1[电气工程—电力电子与电力传动]