基于March C+算法的Memory BIST设计与实现  

Memory BIST design and implement based on March C+ algorithm

作　　者：翟明静[1,2] 殷景华[1] 宋明歆[1] 郭喜俊[1] 

机构地区：[1]哈尔滨理工大学应用科学学院,哈尔滨150080 [2]常州工学院电子信息与电气工程学院,江苏常州213002

出　　处：《哈尔滨商业大学学报（自然科学版）》2009年第5期549-552,共4页Journal of Harbin University of Commerce：Natural Sciences Edition

摘　　要：随着信息技术的发展,设计越来越复杂,嵌入式存储器在SoC芯片面积中所占的比例越来越大,由于本身单元密度很高,嵌入式存储器容易造成硅片缺陷,降低了芯片的成品率.针对投影仪梯形校正项目嵌入的存储器模块存在的故障等问题,讨论了基于M arch C+算法的B IST的设计与实现,并对B IST进行改进,完成对存储器故障的检测和定位,整个测试故障覆盖率接近100%、测试时间为35.546 m s.With the development of information technology, designs become more complex, embedded memory has been taking more and more area in SoC. With the high density, it is much easier to result in fault on the chip. In this paper,the memory BIST design and implement based on the March C ＋ algorithm for memory faults in trapezoidal correction of projector is discussed. And improves the BIST circuit structure. It could find the faults and point out them, The test time is 35. 546 ms and fault coverage reach almost 100%.

关 键 词：MARCH C+算法 嵌入式存储器 BIST SOC 

分 类 号：TP301.6[自动化与计算机技术—计算机系统结构]