基于LVDS的长线传输模块设计  

Design of Multiple Interface of Long Line Transmission Based on LVDS

作　　者：戴萧嫣[1] 王立恒[1] 李圣昆[1] 张时华[1] 

机构地区：[1]中北大学信息与工程学院电子工程系,山西太原030051

出　　处：《通信技术》2009年第11期4-6,共3页Communications Technology

摘　　要：针对并行长线数据传输速度过慢的实际情况,文中介绍了一种基于LVDS串行总线长线传输模块设计。系统采用FPGA作为主控芯片,采用高速串行数字接口自适应电缆均衡器和电缆驱动芯片,增强长线电缆驱动能力,提高了LVDS数据传送的距离。其中通过双绞线电缆、光纤,DS92LV1023和DS92LV1224型号的LVDS芯片与驱动芯片CLC001和CLC006相互配合能使数据传输100米。该系统已投入使用,其性能具有较高可靠性、很强的应用价值。Aiming at the slow speed of parallel data transmission, the multiple interface of long line transmission based on LVDS is designed. The system takes FPGA as the core of control processing module, and serial digital cable driver with adjustable output is used to enhance the distance of data transmission. This system employs two LVDS chips, that is, DS92LV1023 and DS92LV1224, which through coordinating with the driver chips CLC001 and CLC006, could transfer 100 meters by the twisted pair cable and the optical fiber. This system has been put into practical application, and is reliable and stabile in performance, and thus is of great application value.

关 键 词：低压差分信号 长线传输 可编程逻辑器件 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]