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作 者:刘辉志[1,2] 张记龙[1,2] 张辉[1,2] 李晓[1,2] 王志斌[1,2]
机构地区:[1]中北大学仪器科学与动态测试教育部重点实验室,山西太原030051 [2]山西省光电信息与仪器工程技术研究中心,山西太原030051
出 处:《红外》2009年第11期1-6,25,共7页Infrared
基 金:科技部国际合作重点项目(2006DFB72510);国家自然科学基金(60572019);山西省科技攻关项目(20090321044)
摘 要:根据实时光谱探测系统,拟采用傅里叶变换光谱理论获取待测光谱信息。文中首先介绍了实时光谱探测系统的基本工作原理,优化了基2-FFT算法,然后详细描述了该算法的硬件结构和设计思路,重点叙述了算法有限状态机设计地址的产生及控制单元的流程,并利用Xilinx公司XC3S400芯片自带的IP核在ISE9.1软件开发平台上完成了FFT模块的硬件设计。最后采用以VerilogHDL语言编写的Testbench测试程序在第三方仿真软件ModelsimSE6.3f上对FFT模块进行了功能仿真。仿真结果与Matlab理论计算结果的对比表明FPGA硬件设计正确。当芯片工作在100MHz时,实现256点16bit基2-FFT数据所需的时间约为8.6μs,可满足实时光谱探测的要求。In accordance with the requirements of a real-time spectral detection system, the Fourier transform spectral theory is utilized to obtain the spectral information to be detected. First, the basic operation principle of the real-time spectral detection system is presented and a radix-2 FFT algorithm is optimized. Then, the design of the hardware structure of the algorithm is described in detail, the address generation and control process designed by an Algorithm State Machine (ASM) is illustrated emphatically and the hardware design of the FFT module is completed by using a XC3S400 chip with an IP core produced by Xilinx Inc. on an ISE9.1 software development platform. Finally, the Testbench program written in VerilogHDL language is used to simulate the functions of the FFT module on ModelsimSE6.3f, a third-party simulation software. The simulation result is compared with the result calculated by Matlab in theory. It shows that the FPGA hardware is designed correctly. It takes about 8.6μm for the chip operating at 100MHz to implement 256-point 16 bit radix-2 FFT data, which can meet the real-time requirement for spectral detection.
关 键 词:光谱探测 FPGA 快速傅里叶变换 VERILOGHDL MATLAB
分 类 号:TN791[电子电信—电路与系统] TN911.72
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