基于Altium Designer信号完整性模型提取PCB级均方根串扰  

Extract PCB-Level’s RMS Crosstalk Based on SI-Model of Altium Designer

作　　者：黄蕾[1] 牛德青[1] 刘伟[1] 张锐[1] 胡劲[1] 

机构地区：[1]中国兵器工业第五八研究所军品部,四川绵阳621000

出　　处：《兵工自动化》2009年第12期84-88,共5页Ordnance Industry Automation

摘　　要：提出一种基于Altium Designer Winter09信号完整性模型,以Xilinx计算机并口-JTAG下载器转换板(VIII)PCB为例,通过其设计流程并结合设计实例,讨论提取PCB级均方根串扰的可行性与可靠性。结果表明,该方法能节省投产周期,提高生产效率。Brings forward a kind of Sl-model based on Altium Designer Winter 09, taking the Xilinx＇s computer Parallel Port/LPT- JTAG download-adapter （VIII） PCB as example, discussing the feasibility and reliability of extracting the RMS crosstalk of PCB level by its design flow and instance. As the result, this method turns to be able to economize the product period, improving the efficacy.

关 键 词：信号完整性模型 印制电路板级 均方根串扰 

分 类 号：TP274.5[自动化与计算机技术—检测技术与自动化装置] TJ306[自动化与计算机技术—控制科学与工程]