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机构地区:[1]Department of Electronic Engineering,Tsinghua University
出 处:《Tsinghua Science and Technology》2009年第6期698-702,共5页清华大学学报(自然科学版(英文版)
基 金:Supported by the National High-Tech Research and Development (863) Program of China (No.2006AA01Z224);the National Natural Science Foundation of China (No.90707002);the Basic Research Foundation of Tsinghua National Laboratory for Information Science and Technology (TNList)
摘 要:A complementary metal oxide semiconductor (CMOS) transconductor based on a high performance unity-gain buffer driving the degeneration resistor was used to obtain a highly linear voltage-to-current conversion with considerable reduction of the supply voltage. Simulations show that the transconductor using an 0.18-μm standard CMOS process with a 1.2-V supply voltage has less than -80 dB total harmonic distortion (THD) for a 1-MHz 0.4-Vp-p differential input signal. The third-order intermodulation is less than -63 dB for 0.25 Vp-p differential inputs at 1 MHz. The DC power consumption in the transconductor core is 240 μW. This topology is a feasible solution for low voltage and low power applications.A complementary metal oxide semiconductor (CMOS) transconductor based on a high performance unity-gain buffer driving the degeneration resistor was used to obtain a highly linear voltage-to-current conversion with considerable reduction of the supply voltage. Simulations show that the transconductor using an 0.18-μm standard CMOS process with a 1.2-V supply voltage has less than -80 dB total harmonic distortion (THD) for a 1-MHz 0.4-Vp-p differential input signal. The third-order intermodulation is less than -63 dB for 0.25 Vp-p differential inputs at 1 MHz. The DC power consumption in the transconductor core is 240 μW. This topology is a feasible solution for low voltage and low power applications.
关 键 词:low voltage low power high linearity TRANSCONDUCTOR unity gain buffer
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