一种抑制同步开关噪声的改进总线翻转编码方法  

A Modified Bus-Invert Encoding Method for Simultaneous Switching Noise Reduction

作　　者：胡晋[1] 刘耀[1] 金利峰[1] 

机构地区：[1]江南计算技术研究所,江苏无锡214083

出　　处：《微电子学》2009年第6期738-741,746,共5页Microelectronics

基　　金：预先研究基金资助项目(513160401)

摘　　要：提出了一种改进总线翻转编码方法,用于抑制高速集成电路系统中的同步开关噪声。该方法可以显著减少总线平均翻转比特位数,同时尽可能使总线相邻位保持奇模传输,有利于改善信号完整性。利用FPGA实现了提出的改进总线翻转编码模块。物理实验表明,相对总线翻转编码,该方法以功耗稍有增加的代价,可取得平均翻转数量减少15.17%、电源波动噪声减小22.34%的编码增益。A bus-invert encoding method was improved for simultaneous switching noise reduction in high speed IC system. The method greatly reduces the average inverting bits of data-bus and keeps adjacent bus line transmission in odd mode for signal integrity. The proposed bus-invert encoding module was implemented in FPGA. Test results showed that, with a slight power increase, average transition time decreased by 15. 17% and voltage fluctuation noise was reduced by 22. 34%.

关 键 词：高速集成电路 总线翻转编码 同步开关噪声 

分 类 号：TN401[电子电信—微电子学与固体电子学]