一种轨对轨两级CMOS运算放大器的设计  

Design of a rail-to-rail two stages CMOS operational amplifier

作　　者：赵武[1] 马云飞[1] 王召[1] 程卫东[2] 张志勇[1] 

机构地区：[1]西北大学信息科学与技术学院,陕西西安710069 [2]西安微电子技术研究所,陕西西安710054

出　　处：《西北大学学报（自然科学版）》2009年第6期960-963,共4页Journal of Northwest University（Natural Science Edition）

基　　金：教育部"春晖"计划基金资助项目(Z2005-1-61001)

摘　　要：目的设计一个具有轨对轨输入和输出摆幅的两级CMOS运算放大器。方法输入级采用两对单一类型的n沟道差分对管作为输入管,用两个相同的n沟道源跟随器来完成输入电平的直流电平转移,实现了轨对轨的输入摆幅;输出级采用前馈甲乙类控制的轨对轨输出级,保证了轨对轨的输出摆幅和较强的驱动能力。结果用标准的0.6μm CMOS BSIM3v3模型库对该放大器进行了仿真,开环电压增益、单位增益带宽和相位裕度分别达到了113.57dB,11.9MHz和53,°输入级跨导的变化在±5%内。结论所设计运算放大器其输入和输出摆幅为轨对轨,满足设计所提要求。Aim To design a two stages CMOS Operational amplifier （op-amp） with Rail-to-Rail input/output swing. Methods The input stage is based on two pairs of single n-channel differential pairs, and two identical nchannel source followers as DC level shifters, which realizes rail-to-rail input swing. A feedforward biased class-AB rail-to-rail output stage is employed to ensure rail-to-rail output swing and strong driving capability. Results Using BSIM3v3 model of a standard 0. 6μm DPDM CMOS process,the results show that the maximum deviation in transconductance is maintained within ± 5%, and the open loop gain can reach 113.57dB with unity gain bandwidth of 11.9MHz MHz and phase margin of 53°. Conclusion The input/output swing of the op amp is rail-to-rail, which meets the design requirement.

关 键 词：轨对轨 AB类 单位增益带宽 相位裕度 

分 类 号：TN4[电子电信—微电子学与固体电子学]