基于FPGA的数字滤波系统设计  

Design of Digital Filtering System Based on FPGA

作　　者：陈家祯[1] 郑子华[1] 叶锋[1] 连桂仁[1] 

机构地区：[1]福建师范大学数学与计算机学院,福建福州350007

出　　处：《计算机仿真》2009年第12期329-332,共4页Computer Simulation

基　　金：福建省教育厅B类(JB07051)

摘　　要：为研究基于FPGA的数字滤波系统的设计与实现过程,根据数字滤波系统的基本工作原理在芯片内部设计了模数转换采样控制、基于分布式算法的FIR滤波器以及基于FFT IP核应用的频谱分析电路等功能模块,并给出了QUARTUSⅡ平台上的系统设计时序仿真波形。实验结果表明,相比于一般实现方法,基于FPGA实现的数字滤波系统具有高速灵活的优点,FPGA可广泛应用于高速数字信号处理领域。This paper discusses the design and realization of digital filtering system based on FPGA. Circuit modules, including A/D sampling control, FIR filter based on distributed algorithm and frequency analysis circuit based on FFT IP core, which are the major parts of the system, are designed in the chip according to the digital filtering principle, and the simulation waveforms in Quartus Ⅱ are given too. The experiment results show that the method discussed in the paper has the advantages of high speed and flexibility, and FPGA could be widely used in the high speed digital signal processing research areas.

关 键 词：数字滤波 分布式算法 频谱分析 

分 类 号：TN47[电子电信—微电子学与固体电子学]