Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation  

作　　者：马海峰 周锋 

机构地区：[1]State Key Laboratory of ASIC & System,Fudan University

出　　处：《Journal of Semiconductors》2010年第1期73-78,共6页半导体学报（英文版）

基　　金：supported by Shanghai-Applied Material Research Development Fund(No.09700714100).

摘　　要：A full on-chip and area-efficient low-dropout linear regulator （LDO） is presented. By using the proposed adaptive frequency compensation （AFC） technique, full on-chip integration is achieved without compromising the LDO＇s stability in the full output current range. Meanwhile, the use of a compact pass transistor （the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique） has enabled the LDO to be very areaefficient. The proposed LDO is implemented in standard 0.35 μm CMOS technology and occupies an active area as small as 220 × 320/zm^2, which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0-60 mA output current with 54 μA quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V.A full on-chip and area-efficient low-dropout linear regulator （LDO） is presented. By using the proposed adaptive frequency compensation （AFC） technique, full on-chip integration is achieved without compromising the LDO＇s stability in the full output current range. Meanwhile, the use of a compact pass transistor （the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique） has enabled the LDO to be very areaefficient. The proposed LDO is implemented in standard 0.35 μm CMOS technology and occupies an active area as small as 220 × 320/zm^2, which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0-60 mA output current with 54 μA quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V.

关 键 词：low-dropout regulator frequency compensation full on-chip SYSTEM-ON-CHIP 

分 类 号：TN43[电子电信—微电子学与固体电子学]