可重构阵列DSP结构ReMAP  

ReMAP:a reconfigurable array DSP architecture

作　　者：王新安[1] 叶兆华[1] 戴鹏[1] 周丹[1] 

机构地区：[1]北京大学深圳研究生院集成微系统科学工程与应用国家重点实验室,深圳518055

出　　处：《深圳大学学报（理工版）》2010年第1期16-20,共5页Journal of Shenzhen University(Science and Engineering)

基　　金：国家高技术研究发展计划资助项目(2009AA01Z127);深圳市科技计划项目(SZKJ-2007017)

摘　　要：为满足多媒体处理等领域要求芯片高性能,且开发周期短的需求,提出一种可重构阵列DSP的结构——ReMAP.该阵列结构由多个运算单元、存储器和交换开关等级联组成,易于扩展和配置.通过把算法分割映射到多个运算单元之中,提高芯片对计算密集型任务的执行效率.在SMIC 0.18μm工艺下完成了ReMAP芯片的原型验证,包含16个ALU单元.测试结果表明,该结构能以较高效率完成如SAD和DCT等视频处理相关算法.Current IC design, especially that for multimedia processing, requires high performance and short development time. To satisfy these design requirements for an optimal time-to-market, a reeonfigurable Array DSP architecture （ReMAP） with processing elements, memory, switch, and other components was proposed. Pipeline reconfiguration was introduced for performance improvement of applications. The antitype chip with 2 × 2 PEs was fabricated in SMIC 0. 18 μm CMOS, which contains 16 reALUs. Some common algorithms such as DCT and SAD were implemented in ReMAP. The result shows that the architecture can support high performance implementation of media processing.

关 键 词：计算机工程 可重构阵列处理器 计算密集型处理器 数字信号处理 多媒体处理 

分 类 号：TN47[电子电信—微电子学与固体电子学] TP302[自动化与计算机技术—计算机系统结构]