亚阈值32位数据通路设计  

Design of a sub-threshold 32-bit datapath

作　　者：刘鸣[1] 陈虹[1] 贾晨[1] 王志华[1] 

机构地区：[1]清华大学微电子学研究所,北京100084

出　　处：《清华大学学报（自然科学版）》2010年第1期9-12,共4页Journal of Tsinghua University(Science and Technology)

基　　金：国家自然科学基金资助项目(60475018)

摘　　要：亚阈值数字电路技术是特殊的超低功耗技术,适用于对低功耗要求苛刻,但速度要求不高的应用领域。该文提出了亚阈值数字标准单元设计方法,从尺寸、驱动、结构几方面设计了亚阈值数字标准单元库。一个采用亚阈值单元库设计的32位数据通路结果表明:与采用传统库相比,数据通路的噪声容限提高了8%,工作频率提高了42%,能耗降低了27%,能量延迟积降低了49%,漏电流降低了64%。Sub-threshold digital circuits is an ultra-low power technology for applications that do not require high speed. This paper provides circuit design methods for sub-threshold standard cells including size, drive capability, and structure for a sub-threshold digital standard library. Simulations of a 32-bit data-path designed using the sub-threshold cells show that the noise margin of the new data-path is improved by 8%, the frequency by 42%, the energy consumption by 27%, the Energy-Delay Product （EDP） by 49% and the leakage current by 64% compared with the convention library.

关 键 词：亚阈值数字电路 超低功耗 标准单元 标准单元库 数据通路 

分 类 号：TN492[电子电信—微电子学与固体电子学]