一种改进的记录缓冲低功耗指令cache方案  

An enhanced energy efficient instruction cache based on record buffer

作　　者：马志强[1] 季振洲[2] 胡铭曾[2] 

机构地区：[1]哈尔滨工程大学计算机科学与技术学院,黑龙江哈尔滨150001 [2]哈尔滨工业大学计算机科学与技术学院,黑龙江哈尔滨150001

出　　处：《江苏大学学报（自然科学版）》2010年第1期72-77,共6页Journal of Jiangsu University：Natural Science Edition

基　　金：国家自然科学基金资助项目(60475012)

摘　　要：针对记录缓冲低功耗cache过滤大部分无效访问、降低功耗的同时无法降低静态功耗的问题,在记录缓冲基础上提出一种改进方案.设计了针对指令存储单元的状态控制电路,在相应的控制逻辑的驱动下自动将不常用的指令存储单元设置为休眠状态,从而有效节省cache的静态功耗.为验证方案的有效性,采用10个SPEC2000标准测试程序进行仿真,并与传统缓冲cache在功耗、性能及面积上进行比较.结果表明该方案在牺牲少量性能和面积的基础上可有效节省指令cache的静态和动态功耗.To solve the problem that low-power recorder buffer cache （RBC） has no contribution to static power saving while saving the active power consumption by filtering the unnecessary data array accesses, an enhanced recorder buffer cache（ERBC） is proposed based on RBC. The state control circuit for instruction storage unit is designed. Actuated by the control logic, this circuit could place invalid instruction storage unit in sleep state, thus the static power consumption can be saved. To verify the validity of ERBC, simulation is conducted by using ten SPEC2000 standard test program. The result is compared with traditional buffer cache in terms of power consumption, performance and chip area. The rresuhs show that ERBC can save both active and static power efficiently at the cost of little slowdown and area increasement.

关 键 词：CACHE 低功耗 静态功耗 动态功耗 缓冲器 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]