连接主从IP核的片上网络路由器结构  

NoC Router Architecture for Master and Slave IP Core

作　　者：张春淼[1] 林红君[1] 

机构地区：[1]西安电子科技大学计算机学院,陕西西安710071

出　　处：《中国集成电路》2010年第2期36-41,共6页China lntegrated Circuit

摘　　要：随着单个芯片上集成的元器件数目不断增加,功耗问题也变得越来越突出。片上网络虽然能够从理论上解决传统总线结构带来的种种问题,但其功耗问题在某些具体应用中却变成了关键的制约因素。路由器作为片上网络的核心部件,其结构直接影响片上网络的性能。路由器的功耗问题已经成为片上网络领域一个热点问题。本文运用最优化理论对连接主从IP核的片上网络路由器结构进行优化设计,并运用路由器的功耗模型对功耗问题进行了分析。最后运用OPNET仿真软件对路由器的交换机制和路由算法进行分析对比,得出最终结论。With the development of semiconductor technology, the number of components integrated into a single chip increases continuously, so power issues become more important. Although NoC overcomes several problems in traditional bus architecture, its power issues in certain applications become main constraints. As a key component, architecture of router directly affects the performance of NoC. Power issues become a hot topic in NoC research. In this paper, we optimize NoC router architecture for master and slave IP cores using optimization algorithms. We also give a router power model. Finally, we use OPNET to simulate the switching technology and routing algorithm of the optimized router.

关 键 词：片上网络 路由器结构 最优化算法 功耗 OPNET仿真 

分 类 号：TN915.05[电子电信—通信与信息系统]