高速差分信号的互连设计  

Design on Inter-connectivity of High Speed Differential Signals

作　　者：赵增辉[1] 刘中友[1] 彭圻平[1] 

机构地区：[1]中国电子科技集团公司第五十四研究所,河北石家庄050081

出　　处：《无线电通信技术》2010年第1期50-53,共4页Radio Communications Technology

摘　　要：高速IC芯片之间的互连主要通过3种串行差分信号-LVPECL、LVDS和CML实现。分别简要介绍了这3种信号的标准和输入输出接口的结构;并且结合工程的实际应用,以LVPECL到LVPECL、LVPECL到CML以及LVPECL到LVDS为例,详细介绍了高速差分信号互连的基本原理和实现方案。对比了直流耦合和交流耦合2种实现方式的复杂度,明确了直流耦合和交流耦合的应用场合。结合理论分析,讨论了交流耦合参数的选择原则。The inter-connectivity of high-speed IC chips is mainly realized through 3 kinds of serial diffrential signals such as LVPECL, LVDS and CML. The main standard of these signals and the structure of input and output interface are briefly introduced. And the main principle and accomplishment of the inter-connectivity of the signals are mainly discribed base on LVPECL to LVPECL, LVPECL to CML and LVPECL to LVDS. By comparing with the complexity of DC couple and AC couple, the paper describes their apply situation. Based on the theoretic analysis, it discusses the selection principle of AC coupled capacitor.

关 键 词：LVPECL LVDS CML 直流耦合 交流耦合 

分 类 号：TN911.6[电子电信—通信与信息系统]