System Architecture of Godson-3 Multi-Core Processors  被引量:7

System Architecture of Godson-3 Multi-Core Processors

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作  者:高翔 陈云霁 王焕东 唐丹 胡伟武 

机构地区:[1]Institute of Computing Technology,Chinese Academy of Sciences [2]Graduate University of Chinese Academy of Sciences

出  处:《Journal of Computer Science & Technology》2010年第2期181-191,共11页计算机科学技术学报(英文版)

基  金:Supported by the National High Technology Development 863 Program of China under Grant No.2008AA010901;the National Natural Science Foundation of China under Grant Nos.60736012 and 60673146;the National Basic Research 973 Program of China under Grant No.2005CB321601.

摘  要:Godson-3 is the latest generation of Godson microprocessor family. It takes a scalable multi-core architecture with hardware support for accelerating applications including X86 emulation and signal processing. This paper introduces the system architecture of Godson-3 from various aspects including system scalability, organization of memory hierarchy, network-on-chip, inter-chip connection and I/O subsystem.Godson-3 is the latest generation of Godson microprocessor family. It takes a scalable multi-core architecture with hardware support for accelerating applications including X86 emulation and signal processing. This paper introduces the system architecture of Godson-3 from various aspects including system scalability, organization of memory hierarchy, network-on-chip, inter-chip connection and I/O subsystem.

关 键 词:multi-core processor scalable interconnection cache coherent non-uniform memory access/non-uniform cache access (CC-NUMA/NUCA) MESH CROSSBAR cache coherence reliability availability and serviceability (RAS) 

分 类 号:TP332[自动化与计算机技术—计算机系统结构] TU855[自动化与计算机技术—计算机科学与技术]

 

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