Physical Design Methodology for Godson-2G Microprocessor  

作　　者：赵继业 刘动 郇丹丹 苏孟豪 肖斌 徐英 史峰 陈晨 王松 

机构地区：[1]Institute of Computing Technology,Chinese Academy of Sciences [2]Graduate University of Chinese Academy of Sciences [3]China Graduate University of Chinese Academy of Sciences

出　　处：《Journal of Computer Science & Technology》2010年第2期225-231,共7页计算机科学技术学报（英文版）

基　　金：Supported by the National High Technology Research and Development 863 Program of China under Grant No.2007AA01Z114.

摘　　要：The Godson-2G microprocessor is a high performance SOC which integrates a four-issue 64-bit high performance CPU core （called GS464）, a DDR2/3 controller, a HyperTransport controller, a PCI/PCI-X controller, etc. It is physically implemented in 65 nm CMOS process and reaches the frequency of 1GHz with power consumption less than 4 W. The main challenges of Godson-2G physical implementation include nanometer process technology effects, high performance design targets, and tight schedule. This paper describes the key innovative features of physical design methodology which had been used in Godson-2G physical implementation, with particular emphasis on interconnect driven floorplan generation （ICD-FP）, adapted boundary constraints design optimization （ABC-OPT）, automatic register group clock tree generation methodology （ARG-CTS）.The Godson-2G microprocessor is a high performance SOC which integrates a four-issue 64-bit high performance CPU core （called GS464）, a DDR2/3 controller, a HyperTransport controller, a PCI/PCI-X controller, etc. It is physically implemented in 65 nm CMOS process and reaches the frequency of 1GHz with power consumption less than 4 W. The main challenges of Godson-2G physical implementation include nanometer process technology effects, high performance design targets, and tight schedule. This paper describes the key innovative features of physical design methodology which had been used in Godson-2G physical implementation, with particular emphasis on interconnect driven floorplan generation （ICD-FP）, adapted boundary constraints design optimization （ABC-OPT）, automatic register group clock tree generation methodology （ARG-CTS）.

关 键 词：computer architecture Godson-2G physical design methodology nanometer process 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]