A low power wide-band CMOS PLL frequency synthesizer for portable hybrid GNSS receiver  

作　　者：肖时茂 于云丰 马成炎 叶甜春 殷明 

机构地区：[1]Institute of Microelectronics,Chinese Academy of Sciences [2]Hangzhou Zhongke Microelectronics Co Ltd

出　　处：《Journal of Semiconductors》2010年第3期85-89,共5页半导体学报（英文版）

基　　金：supported by the National High Technology Research and Development Program of China(No.2007AA12Z344).

摘　　要：The design consideration and implementation of a CMOS frequency synthesizer for the portable hybrid global navigation satellite system are presented. The large tuning range is achieved by tuning curve compensation using an improved VCO resonant tank, which reduces the power consumption and obtains better phase noise performance. The circuit is validated by simulations and fabricated in a standard 0.18 μm 1P6M CMOS process. Close-loop phase noise measured is lower than -95 dBc at 200 kHz offset while the measured ttming range is 21.5% from 1.47 to 1.83 GHz. The proposed synthesizer including source coupled logic prescaler consumes 6.2 mA current from 1.8 V supply. The whole silicon required is only 0.53 mm2.The design consideration and implementation of a CMOS frequency synthesizer for the portable hybrid global navigation satellite system are presented. The large tuning range is achieved by tuning curve compensation using an improved VCO resonant tank, which reduces the power consumption and obtains better phase noise performance. The circuit is validated by simulations and fabricated in a standard 0.18 μm 1P6M CMOS process. Close-loop phase noise measured is lower than -95 dBc at 200 kHz offset while the measured ttming range is 21.5% from 1.47 to 1.83 GHz. The proposed synthesizer including source coupled logic prescaler consumes 6.2 mA current from 1.8 V supply. The whole silicon required is only 0.53 mm2.

关 键 词：CMOS GNSS dual-modulus voltage-controlled oscillator frequency synthesizer 

分 类 号：TN742[电子电信—电路与系统]