匹配滤波器同步捕获技术FPGA设计  

FPGA Design of Matched Filter Synchronous Capture Technology

作　　者：代敏[1] 禹思敏[1] 罗玉玲[1] 

机构地区：[1]广东工业大学自动化学院,广东广州510006

出　　处：《通信技术》2010年第2期13-16,共4页Communications Technology

基　　金：国家自然科学基金(批准号:60871025);广东省自然科学基金(批准号:8151009001000060)资助课题

摘　　要：匹配滤波器在信号检测和通信系统的同步捕获中起着关键的作用。基于软件无线电思想,分析了匹配滤波器的基本原理,采用一种可编程的分布算术式匹配滤波器同步捕获技术,可用于直接序列扩频接收机。模块采用Altera公司的FPGA Cyclone II EP2C35F672进行设计,仅占用全部逻辑资源的1%。对设计中部分功能单元进行了ModelSim功能仿真,给出了数值实验结果。The matched filter plays a key role in signal detection and synchronous capture of the communication system. Based on the idea of software radio, this paper analyses the principle of matched filter. The synchronization capture technology of programmable distributed arithmetic-type matched filter is applied to the direct sequence spread spectrum receiver. Altera FPGA CycloneII EP2C35F672 is used to design, thus occupying only 1% of all the logic resources. Functional simulations on certain design units are made with ModelSim, and the numerical experimental results also given in this paper.

关 键 词：扩频通信 匹配滤波器 同步捕获 

分 类 号：TN911.8[电子电信—通信与信息系统]