基于校验式的节点同步与相位模糊检测方法的FPGA实现  

Implement of node synchronization based on parity check and detecting phase ambiguity on FPGA

作　　者：唐永军[1] 尹锁柱[1] 符杰林[1] 常洪明[1] 李黎[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林51004

出　　处：《桂林电子科技大学学报》2010年第1期49-53,共5页Journal of Guilin University of Electronic Technology

基　　金：广西科学研究与技术开发计划项目(0815002-12)

摘　　要：一种基于校验矩阵的节点同步及相位模糊检测的方案,不仅能提取不同穿凿码率卷积编码的同步信息,而且还能纠正的相位模糊,当Eb/No=6 dB甚至在信噪比更低的情况下,都能提取出同步信息,而且在DVB-S系统当中得到了很好的应用,并通过了软件仿真和FPGA实现。This paper introductes a program based on syndrome based node synchronization algorithm and phase ambiguity, it is not only can find the sync bytes of different rates of punctured convolutional code but also can detect and correct ±π/2 phase ambiguity, it works properly with Eb/No below to 6 dB or less. This program has been used in DVB-S system, This paper presents the emulation and implement on FPGA.

关 键 词：节点同步 卷积码 校验矩阵 相位模糊 

分 类 号：TP393.04[自动化与计算机技术—计算机应用技术]