基于FPGA的FFT处理器设计与实现  

Design and Implementation of FFT Processor Based on FPGA

作　　者：杨静[1] 郑恩让[1] 张玲[1] 马令坤[1] 

机构地区：[1]陕西科技大学电气与信息工程学院,西安710021

出　　处：《化工自动化及仪表》2010年第3期107-109,124,共4页Control and Instruments in Chemical Industry

基　　金：温州市科学技术局项目(H20080001)

摘　　要：针对所设计数字谐波分析仪中速度和实现成本的瓶颈,提出一种基于FPGA的高速FFT处理器设计方法,并用CycloneII系列FPGAEP2C35F672C6芯片实现了处理器。处理器采用按时间抽取基4算法,使用改进的CORDIC流水线结构设计蝶形运算单元,同时采用双端口RAM存储结构,整体基于VHDL语言进行模块化设计,经过仿真和硬件测试,结果与MATLAB计算结果相比较验证了设计的正确性。当系统工作频率为90MHz时,完成1024点输入为12位复数的FFT需要45.6μs,满足所设计的数字频谱分析仪系统实时性要求,解决了系统实时性和资源占用的矛盾。同时该处理器是在不使用IP核的前提下开发的,降低了实现成本。In order to solve the speed and design cost bottleneck of digital spectrum analyzer, a design method of high speed FFT processor based on FPGA was proposed which CycloneⅡ FPGA EP2C35F672C6 chip was used to achieve the processor. The processor adopts the method of decimate in time Radix-4 algorithm. The FPI＇ butterfly computing unit was designed by ameliorative CORDIC pipeline structure and dual-port RAM was used. The entire system was designed by VHDL and tested by using the simulation and hardware testing tool. The accuracy of design has been confirmed by comparison between the simulation result and the calculating result of MATLAB. It shows that the total simulation time of the 1024 points FFT is 45.6 txs,when operated at 90 MHz clock. The design satisfies the realtime requirement of the digital spectrum analyzer system, solving the conflicts between the real-time and resource occupied of the system. And the design is in the non-use of IP core, which greatly reduces the design cost.

关 键 词：FFT处理器 FPGA VHDL语言 CORDIC算法 

分 类 号：TN702[电子电信—电路与系统]