A full asynchronous serial transmission converter for network-on-chips  被引量:1

A full asynchronous serial transmission converter for network-on-chips

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作  者:杨银堂 管旭光 周端 朱樟明 

机构地区:[1]Institute of Microelectronics,Xidian University

出  处:《Journal of Semiconductors》2010年第4期85-93,共9页半导体学报(英文版)

基  金:supported by the National Natural Science Foundation of China(Nos.60676009,60725415,60971066,60803038);the National High-Tech Program of China(Nos.2009AA01Z258,2009AA01Z260).

摘  要:Large transmission power consumptions and excessive interconnection lines are two shortcomings which exist in conventional network-on-chips. To improve performance in these areas, this paper proposes a full asynchronous serial transmission converter for network-on-chips. By grouping the parallel data between routers into smaller data blocks, interconnection lines between routers can be greatly reduced, which finally brings about saving of power over- heads in the transmission process. Null convention logic units are used to make the circuit quasi-delay insensitive and highly robust. The proposed serial transmission converter and serial channel are implemented based on SMIC 0.18 μm standard CMOS technology. Results demonstrate that this full asynchronous serial transmission converter can save up to three quarters of the interconnection line resources and also reduce up to two-thirds of the power consumption under 32 bit data widths. The proposed full asynchronous serial transmission converter can apply to the on chip network which is sensitive to area and power.Large transmission power consumptions and excessive interconnection lines are two shortcomings which exist in conventional network-on-chips. To improve performance in these areas, this paper proposes a full asynchronous serial transmission converter for network-on-chips. By grouping the parallel data between routers into smaller data blocks, interconnection lines between routers can be greatly reduced, which finally brings about saving of power over- heads in the transmission process. Null convention logic units are used to make the circuit quasi-delay insensitive and highly robust. The proposed serial transmission converter and serial channel are implemented based on SMIC 0.18 μm standard CMOS technology. Results demonstrate that this full asynchronous serial transmission converter can save up to three quarters of the interconnection line resources and also reduce up to two-thirds of the power consumption under 32 bit data widths. The proposed full asynchronous serial transmission converter can apply to the on chip network which is sensitive to area and power.

关 键 词:network-on-chips full asynchronous serial transmission converter threshold gate low power 

分 类 号:TN47[电子电信—微电子学与固体电子学]

 

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