SAR目标模拟器硬件平台设计与实现  

Design and Realization of Hardware Platform for SAR Target Simulator

作　　者：杨春[1] 宋玉霞[1] 陈娟[1] 

机构地区：[1]中国西南电子技术研究所,成都610036

出　　处：《电讯技术》2010年第4期15-19,共5页Telecommunication Engineering

摘　　要：针对当前国内大多数雷达目标模拟器不能模拟大时带宽积合成孔径雷达(SAR)目标回波问题,提出了一种SAR目标模拟器硬件平台架构,采用FPGA控制DDRII存储器来存储和输出数字回波,通过数模转换后可以输出带宽150 MHz以上模拟回波信号。由于主机与目标模拟板通信采用CPCI总线,其数据吞吐率比采用USB接口的注入式SAR目标模拟器高。该平台可以3个通道同时输出不同信号,因此可模拟聚束、条带和扫描SAR等工作模式回波。测试结果表明该平台满足系统指标设计要求。Most domestic radar target simulators can not simulate synthetic aperture radar（SAR） target based on large timebandwidth. To solve this problem,this paper proposes a hardware scheme for SAR target simulator system in which FPGA is used to control DDRII to memory or output digital echo. This system can output more than 150MHz bandwidth analog echo signal with digital - analog converter（DAC）. The host computer can communicate with target simulator board based on Compact PCI （CPCI） bus. The data throughput of this system is larger than that of injection SAR target simulator with USB interface. This system can simulate the working modes of the spotlight, strip map, scan SAR echo signal because it can output different signal in three channels simultaneously, Test result shows that it meets the demand of the SAR target simulator.

关 键 词：合成孔径雷达 目标模拟器 大时带宽积 数据吞吐率 

分 类 号：TN955[电子电信—信号与信息处理]