基于ADF4111的数字锁相式可调频率源实现  

Realization of Tuned PLL Based on Frequency Synthesizer

作　　者：王大磊[1] 王斌[1] 

机构地区：[1]解放军信息工程大学信息工程学院,河南郑州450002

出　　处：《现代电子技术》2010年第8期189-193,共5页Modern Electronics Technique

摘　　要：为了在短波接收系统中提供高精度和稳定度的可调本振,采用FPGA与频率综合器ADF4111相结合的方法,产生了范围为70~90 MHz,步进间隔1 MHz的数字锁相式可调频率源,并通过数码管将锁定后的频率值显示出来。重点阐述系统设计方案、硬件实现、主要电路单元设计。最后对本振输出进行测试,结果符合设计指标要求。该方法能根据实际工程需要改变输出信号的频率,步进间隔以及功率,使该类型电路设计能广泛应用于无线通信设备中,为设备的中频和射频电路提供高质量的本振。A method to combine FPGA and frequency synthesizer ADF4111 to generate a digital phase-lock tunable frequency source with the bandwidth of 20 MHz （from 70 MHz to 90 MHz） and stepping interval of 1MHz is adopted. To provide high-precision and high-reliablity local frequency for HF receiving system. The locked frequency value is displaye on digital code displayer. The system design, realization of hardware and main parts of the circuit are elaborated. The output of the local frequency was measured, and the result is coincident with the requirement of system design. The frequency, stepping interval and power of output signal can be changed with the method according to the actual requirements. Therefore, this type of circuit can be widely applied in wireless communication and can provide the high-quality local frequency for IF and RF equipments.

关 键 词：FPGA ADF4111 频率综合器 锁相环 

分 类 号：TN911[电子电信—通信与信息系统]