高性能10W D类音频功率放大器设计  

A multi-loop voltage-feedback filterless class-D switching audio amplifier using unipolar pulse-width-modulation high-effective 10 W class-D audio power amplifier

作　　者：黄伟[1] 马成炎[1,2] 叶甜春[1] 

机构地区：[1]中国科学院微电子研究所,北京100029 [2]杭州中科微电子有限公司,杭州310053

出　　处：《华中科技大学学报（自然科学版）》2010年第4期26-30,53,共6页Journal of Huazhong University of Science and Technology(Natural Science Edition)

基　　金：国家科技重大专项支持基金资助项目(2009ZX02304-003-1)

摘　　要：提出一种双反馈回路的2阶闭环脉宽调制(PWM)方式的D类放大器结构,在保证系统稳定性的同时通过增加反馈环路增益来改善放大器性能.分析了系统结构工作机制,并采用系统级行为模型仿真和晶体管级电路仿真进行验证.本设计采用上华0.5μmBCD工艺,全差分结构、全桥输出,实现了输出功率2×10W的双声道立体声D类音频功率放大器.实验结果表明,效率可达90%,fPSRR为82dB@1kHz,总谐波失真为0.05%,芯片面积为4.37mm×3.46mm,静态工作电流31mA,关断电流小于100nA.实现了大功率高性能D类功率放大器的设计要求.Second-order architecture of class-D amplifier with dual feedback loops is presented.Owing the large loop gain the performance of the system is improved.We analyzed the mechanics of proposed architecture systematically and verified it with simulations running with both behavioral level model and transistor level circuit.Our design utilized a fully differential architecture,a full bridged output to implement a 2脳10 W class-D audio power amplifier which is realized in central semiconductor manufacturing corporation （CSMC） 0.5 渭m bipolar-CMOS-DMOS （BCD） process.Experimental results show a low total-harmonic-distortion （THD） of 0.05% and high power-supply-rejection-ratio （PSRR） of 82 dB with 90% power efficiency when output power is 10 W,which meets the performance of a high output power class-D audio amplifier with good quality.The chip which consumes 4.37 mm脳3.46 mm die area dissipates 31 mA quiescent current and only less than 100 nA leakage current when shut down.

关 键 词：D类放大器 反馈 环路增益 总谐波失真 非线性失真 

分 类 号：TN722.7[电子电信—电路与系统]