基于FPGA和DSP的自适应旁瓣对消的工程实现  

The engineering implementation of adaptive sidelobe cancellation based on FPGA and DSP

作　　者：杜春鹏[1] 王雨阳[1] 陆鹏程[1] 

机构地区：[1]华东电子工程研究所,合肥230088

出　　处：《雷达与对抗》2010年第1期18-22,共5页Radar & ECM

摘　　要：详细介绍了旁瓣对消技术的工程实现方法。通过试验,对比了权系数浮点运算精度对旁瓣对消性能的影响,结果表明在辅助通道较多时用双精度浮点计算权系数进行对消可以获得较好的对消比。本文介绍的旁瓣对消模块现已应用于某雷达,在实际工作中满足雷达系统抗干扰性能指标的要求。The engineering implementation of the adaptive sidelobe cancellation （ASLC） is expatiated, and effects of the operational precision of weighting coefficient floating points on performances of the ASLC are compared via the test. The results show that better cancellation ratio is obtained through the weighting coefficient calculation of the double precision floating point in multiple auxiliary channels. With applications in certain radar, the module of the ASLC meets the requirements of anti-jamming performances of radar system.

关 键 词：自适应旁瓣对消 对消比 单/双精度浮点 

分 类 号：TN973[电子电信—信号与信息处理]