1.2V高线性度低噪声折叠混频器设计  

Design of a 1.2V High Linearity and Low Noise Folded Mixer

作　　者：程知群[1] 朱雪芳[1] 高俊君[1] 徐胜军[1] 

机构地区：[1]杭州电子科技大学射频电路与系统教育部重点实验室,杭州310018

出　　处：《电子器件》2010年第2期166-169,共4页Chinese Journal of Electron Devices

基　　金：国家自然科学基金资助(60776052)

摘　　要：设计一种工作在1.2 V低电源电压下的折叠混频器。混频器电路采用折叠结构和电流复用技术,降低电源电压,减小直流功耗,降低噪声、提高增益和线性度。跨导级采用交流耦合互补跨导进一步降低电源电压。混频器设计基于SMIC0.18μm标准CMOS工艺。仿真结果表明:输入射频频率和输出中频频率为2.5 GHz和100 MHz时,IIP3为3.857 dBm,NF为5.257 dB,转换增益为9.787 dB,功耗为5.22 mW。A 1.2 V low voltage supply folded-switching mixer is designed in this paper.The approaches of folded-switching and current-reuse are used to reduce the supply voltage and decrease the dc power consumption and reduce noise figure and increase gain and linearity.Ac-coupled technique is used in the transconductance stage to reduce the supply voltage ulteriorly.The 0.18 μm CMOS process is adopted in the design of the mixer.Simulated results show that the proposed mixer exhibitis IIP3 of 3.857 dBm,NF of 5.257 dB,coversion gain of 9.787 dB with a power comsumption of 5.22 mW at the RF frequency of 2.5 GHz and IF frequency of 100 MHz.

关 键 词：折叠混频器 电流复用 低电源电压 低噪声系数 

分 类 号：TN4[电子电信—微电子学与固体电子学]