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作 者:郑丹丹[1] 张培勇[1] 吕冬明[1] 严晓浪[1]
机构地区:[1]浙江大学超大规模集成电路研究所,浙江杭州310027
出 处:《浙江大学学报(工学版)》2010年第4期665-669,共5页Journal of Zhejiang University:Engineering Science
基 金:国家自然科学基金资助项目(60720106003)
摘 要:针对超深亚微米集成电路SOC设计中时钟偏差优化设计的难题,提出一种基于粒子群优化(PSO)算法的有用时钟偏差规划方法.在电路中引入有用偏斜,通过惯性权重线性递减的自适应PSO算法对关键路径上时钟输入端的延时进行调整,并采用最差时间违反作为适应函数对有用时钟偏差进行全局搜索寻求最优解,从而减小电路的时钟周期,优化电路的时序性能.与现有的经典图论算法相比,该方法通过优化组合逻辑的延时,可以找到更优解.应用该算法对32位嵌入式CPU进行优化计算,实验结果证明了该方法的正确性和有效性.To deal with the difficulties in optimal design for clock skew scheduling of SOC in very deep sub-micron integrated circuit,a novel useful clock skew scheduling based on particle swarm optimization (PSO) was presented to optimize circuit performance.This technique introduces useful skew in circuits and adopts adaptive PSO with linearly decreasing inertia weight to adjust the clock input delay of critical path.Global search is performed at useful clock skew that using worst negative slack as fitness function to find the optimal solution,consequently reduces the clock period and optimize the circuit performance.Compared with other existing graph based algorithms,the proposed technique can obtain better solution by optimizing the combinational path delays.The application to 32-bit embedded CPU show that this algorithm is correct and effective.
分 类 号:TN402[电子电信—微电子学与固体电子学]
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