一种单锁相环最大比极化分集合成算法的FPGA实现  

Realization of A Single-PLL Maximal-Ratio Polarization Diversity-Synthesized Algorithm on FPGA

作　　者：李湘鲁[1] 黄强[1] 

机构地区：[1]中国工程物理研究院电子工程研究所,绵阳621900

出　　处：《电信科学》2010年第5期93-95,共3页Telecommunications Science

基　　金：国家自然科学基金;中国工程物理研究院联合基金(NSAF)资助项目(No.10876103)

摘　　要：为改善极化信号接收质量,遥测接收系统通常采用极化分集合成方案。而大部分方案采用多锁相环分集接收结构,电路相对复杂,实现较困难。本文提出一种单锁相环最大比极化分集合成接收电路,仿真表明该电路有效可靠、结构简单,具有较好的工程应用价值,并已通过FPGA实现应用于工程中。In order to improve the acquisition quality of polarization signal, the telemetry receiving systems usually use the polarization diversity-synthesized scheme. And most of them are multi-PLL diversity receiving structure which is complex and hard-realizing. This paper presents a single-PLL maximal-ratio polarization diversity-synthesized receiving circle. The simulation shows the circle which has great application value in project is simple in structure and easy to implement. And it’s already applied in a project on FPGA.

关 键 词：锁相环 极化分集合成 最大比 FPGA 

分 类 号：TN911.8[电子电信—通信与信息系统]