一种新的基于PIM技术的MPP协处理器体系结构设计  

A new architecture design of MPP co-processor based on PIM technology

作　　者：王光[1] 

机构地区：[1]西安文理学院计算机科学系,西安710065

出　　处：《中国科学技术大学学报》2010年第5期546-550,共5页JUSTC

摘　　要：图像处理算法的数据并行化有两种实现方案:一种是共享存储器方案,另一种是分布存储器方案.目前,基本上都是采用共享存储器方案.共享存储器方案的一套硬件对应一个存储字长,这样存储字长可以很长.但是,共享存储器方案存在芯片引出头问题.分布存储器方案又称为PIM方案,是将存储器与处理元PE集成到一个芯片中.针对现代媒体处理中存在的数据带宽、数据存储延迟、芯片集成度和引出头等问题,提出了一种基于PIM技术的MPP协处理器体系结构.该协处理器体系结构在芯片引出头、数据带宽、数据存储延迟、低功耗等方面取得了技术创新.There are two kinds of data parallel implementation schemes for image processing algorithms. One is shared memory scheme, and the other is distributed memory scheme. Most applications at present adopt the shared memory scheme. Although the memory word is very long, there is the problem of chip pins number in the shared memory scheme. The distributed memory scheme is also called PIM design scheme, which integrates the memory and processor elements on one chip. Aiming at the problems of data bandwidth, data memory delay, degree of chip integration and chip pins number in the modern media microprocessor, a new architecture scheme of MPP coprocessor based on PIM technology was proposed. This coprocessor architecture has accomplished technological innovations in chip pins number, data bandwidth, data memory delay and power consumption.

关 键 词：PIM MPP 体系结构 数据带宽 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]