基于System Generator的Gardner算法的建模与实现  

Modeling and implementation of Gardner algorithm based on System Generator

作　　者：赵旭东[1] 於辉[1] 刘荣毅[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《电子设计工程》2010年第6期104-106,共3页Electronic Design Engineering

摘　　要：为了在数字无线通信中实现位同步,设计一种基于Gardner算法的位同步系统。该系统由定时误差检测,环路滤波器,内插滤波器以及控制器模块组成,运用Xilinx公司高级系统级FPGA开发工具System Generator实现对各个模块的建模和实现。结果表明Gardner算法只需每个符号周期内采样2次,就能算出定时误差,并且对载波相位不敏感,这就使得Gardner算法的结构简单、运算量小,从而能够得到广泛应用。To realize symbol synchronization in digital wireless communications,one symbol synchronization system based on Gardner algorithm is designed. The system consists of timing error detector, loop filter, interpolator as well as controllers, which are all modeled and implemented based on Xilinx＇s advanced system-level FPGA development tools System Generator. The results show that Gardner algorithm can calculate the timing error by only two sampling points per symbol period and it is not sensitive to the carrier phase. The structure of Gardner algorithm is simple and the amount of operation is small, which makes it have been used widely.

关 键 词：GARDNER 位同步 System GENERATOR FPGA 

分 类 号：TN911.7[电子电信—通信与信息系统]